Department: Ingeniería en Automática, Electrónica, Arquitectura y Redes de Computadores

Area: Electronics

Research group: Diseño de Circuitos Microelectrónicos


Áreas PAIDI: Tecnologías de la Información y la Comunicación

Doctor by the Universidad de Cádiz with the thesis Síntesis automática de un equipo de test bajo la Norma IEEE 1149.1 (boundary Scan) 2002. Supervised by Dr. Diego Gómez Vela.

My work has been and is focused on the development of specific hardware solutions based on the automatic synthesis of circuits from VHDL descriptions and optimized for implementation in FPGAs. The fields of application of these developments have been diverse, such as circuits for the automation of Boundary Scan (JTAG) test, specific signal processors with application in the evaluation of the quality of the electrical supply, optimized controllers for coils devoted to electro- stimulation or digital emulators of the behavior of neural networks.